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#	Item
681	VLDB Journal, 4, [removed]), Stanley Y.W. Su, Editor 603 QVLDB Add to Reading List Source URL: www.vldb.org Language: English - Date: 2000-10-17 15:01:11 Computing Quicksort External sorting CPU cache Pointer DEC 7000/10000 AXP Trie Cache Merge sort Sorting algorithms Order theory Mathematics
682	Microsoft Word[removed]Title template 3b-blank20100506.docx Add to Reading List Source URL: www.hpl.hp.com Language: English - Date: 2012-12-07 12:02:39 Computer architecture CPU cache Write-combining Cache X86-64 Memory barrier X86 Memory ordering Dynamic random-access memory Computer memory Computer hardware Computing
683	Automatically Mapping Code on an Intelligent Memory Architecture Jaejin Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2010-12-27 12:05:50 Software engineering CPU cache Cache Central processing unit Computer memory Parallel computing Subroutine Automatic parallelization Control flow Computing Computer programming Compiler optimizations
684	E NABLING INNOVATION The ARM9E Synthesizable Processor Family Simon Segars, CPU Development Manager Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:49:13 ARM architecture ARM9 CPU cache Multi-core processor Cache Advanced Microcontroller Bus Architecture LEON Computer architecture Computer hardware Computing
685	Exploiting iterative-ness for parallel ML computations Henggang Cui, Alexey Tumanov, Jinliang Wei, Lianghong Xu, Wei Dai, Jesse Haber-Kucharsky, Qirong Ho, Gregory R. Ganger, Phillip B. Gibbons, Garth A. Gibson, Eric P. Add to Reading List Source URL: www.pdl.cmu.edu Language: English* - Date: 2014-10-14 11:38:22 Computer architecture Central processing unit Cache CPU cache Lock Multi-core processor Acumem SlowSpotter OpenMP Computing Threads Parallel computing
686	Rocky Mountain Windows Technology Users Group The Best I/O is No I/O Tom West President, hyperI/O LLC July 2008 Add to Reading List Source URL: www.hyperio.com Language: English - Date: 2011-04-01 16:07:33 Computer architecture Windows Vista File system Cache CPU cache RAID Windows Vista I/O technologies Technical features new to Windows Vista Computing Computer memory Computer hardware
687	, 82495DX/82490DX A HIGH PERFORMANCE 2ND LEVEL CACHE FOR THE Intel486™ DX CPU Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:44:46 Central processing unit Computer memory Computing Intel 80486 MESI protocol Intel 82497 Alpha 21164 Computer hardware CPU cache Cache
688	Institute for Network Professionals NICs Add to Reading List Source URL: www.npanet.org Language: English - Date: 1999-02-01 03:00:00 CPU cache Cache Central processing unit Slot 1 Pentium Pro Pentium II Pentium Clock rate Intel Core Computer hardware Computer architecture Computer memory
689	X-Gene™: 64-bit ARM CPU and SoC Paramesh Gopi Gaurav Singh Greg Favor Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-28 00:27:07 CPU cache Cache Computing Computer hardware Central processing unit Computer memory
690	Hardware Performance Monitoring in Memory of NUMAchine Multiprocessor by Add to Reading List Source URL: www.eecg.toronto.edu Language: English - Date: 1999-09-21 22:20:35 Computer memory Computer architecture CPU cache Cache Parallel computing Hardware performance counter Computing Central processing unit Computer hardware

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